Continuous Time Sigma Delta ADC

A few links that explain techniques and suggestions that active Analog Circuit Designers can use.

1.  Current Steering DAC is a commonly used circuit to go along with Multi-bit quantizer for Sigma  Delta Converters.  For a very interesting discussion on them for verilog modelling, read here.
2.  Quantization and Voltage Dynamic Range - here
3. Measuring SNR and PSD for SD ADC implemented on a FPGA
4. Simulating a DSM in Simulink

Hope these help you get started with designing a Sigma Delta ADC.

Cheers !!

Edit:

When you characterize your Silicon, you tend to realise that absense of a screw/nail causes more trouble than the absense of a major testing equipment. The respect towards the smaller things in life increases drastically.

Some more links for the information are given below:

1.  Plotting PSD and SINAD of an ADC in Cadence. One of the best links links that I have found in recent times.